Ethernet design verilog
1.0.0
This program consists of multiple verilog files, including all related files in the hdl folder and some necessary IP cores.
Introduction to file functions
crc.v : Mainly used when sending UDP to calculate the CRC value of UDP packets.
ethernet.v : Encapsulation of udp_send.v and udp_receive.v files.
ethernet_top.v : The sample top-level file of the entire project, which only shows how to call the file and other related ip core files.
udp_receive.v : Responsible for the receiving processing process of udp.
udp_send.v : Responsible for the sending process of udp.
clk : The main clock of the receiving module.
rst_n : Receives the global reset signal of the module.
rx_data_len : The length of the udp packet of received data, which is a parameter of the udp header.
rx_total_len : The length of the ip data packet received, which is the parameter of the ip data header.
update : When a new UDP packet is received, this value will be pulled high for one cycle.
ip_header : The entire received IP data packet header, only supports 160-bit IP data header.
udp_header : The entire received UDP data header, only supports 64-bit UDP data header.
mac : The entire MAC packet received, including destination MAC, source MAC and IP packet type identification.
data_o : Valid data received.
src_mac : Source MAC address of the packet.
src_addr : Source IP address of the data packet.
src_port : Source port address of the data packet.
DF : Parameter of IP data packet, 0 means the data packet can be fragmented, 1 means it cannot be fragmented.
MF : Parameter of the IP packet, 1 means there are still fragments, 0 means this is the last fragment.
e_rxdv : Control IO of RTL8211. When it is high, it means that the received data is valid.
rxd : Receive data IO of RTL8211.
CAN_RECEIVE_BROADCAST : Whether to support receiving broadcast data packets, that is, data packets with MAC address FFFFFFFFFFFF.
DST_ADDR : Set the IP address of the destination address, which is the network card address of RTL8211.
DST_PORT : Set the port address of the destination address, which is the port of RTL8211.
DST_MAC : Set the MAC address of the destination address, which is the MAC address of RTL8211.
IDLE : Idle state, as long as the preamble is received, it enters the R_PRE state.
R_PRE : Receive preamble. After receiving 7 preambles and one start bit data, enter the R_MAC state.
R_MAC : Receive MAC data status, enter R_HEADER state after completion of reception.
R_HEADER : Receive IP data header and UDP data header, and enter R_DATA state after receiving.
R_DATA : Receive UDP valid data, enter R_FINISH after receiving.
R_FINISH : Return to IDLE status.
clk , rst_n signals are as above;
data_i : The data that needs to be sent out. When tx_dv is high, the data that needs to be sent is transmitted to the UDP data packet through this port.
tx_data_len : The length of data sent, parameters of UDP packet.
crc : CRC check code of the entire Ethernet data packet, reserved for data verification.
crcen : The enable signal of the crc module, which can only be calculated for the high crc check module.
crcrst : The reset signal of the crc module, which resets the high crc test module.
start : The start signal of the UDP sending module, which is the start of frame sending for the high-drive module.
busy : The busy signal of the UDP sending module. This signal is pulled high when the module is in the process of framing and sending.
tx_dv : Instruction signal of the UDP sending module, informing the current UDP module that the data can be sent out, please send the data that needs to be sent.
dst_mac : MAC address of the destination address.
dst_addr : IP address of the destination address.
dst_port : The port address of the destination address.
DF , MF are as above.
tx_en : The transmission enable signal of RTL8211. When it is high, the transmission data is valid.
txer : RTL8211’s sending error signal.
txd : RTL8211’s sending data IO.
IP_HEADER_LEN : The length of the ip data packet. The default is fine and does not need to be changed.
TTL : Parameters of IP packets, time to live.
SRC_ADDR : The IP address of the source address.
SRC_PORT : The port of the source address.
SRC_MAC : MAC address of the source address.
IDLE : idle state, start is high and enters MAKE_IP state.
MAKE_IP : Generate IP data packets and enter the MAKE_SUM state.
MAKE_SUM : Calculate the header checksum of the IP packet, and enter the SEND_PRE state after the calculation is completed.
SEND_PRE : Send 7 preamble codes and 1 start code. Then enter the SEND_MAC state.
SEND_MAC : Send the destination MAC, source MAC and IP packet type, and then enter the SEND_HEADER state.
SEND_HEADER : Send IP data header and UDP data header, and then enter SEND_DATA state.
SEND_DATA : Send valid data and enter SEND_CRC state after sending.
SEND_CRC : Send CRC data and enter IDLE_CODE state after sending.
IDLE_CODE : Send 12 idle codes, a requirement for Ethernet data packets. Return to IDLE state after sending
In order to meet the timing requirements of 125Mhz, the codes of these two core parts have been modified as much as possible. For example, in udp_send, when sending MAC and data headers, a state machine is used to send the corresponding bit data according to the counter value. I have tried it before. By directly sending the upper eight bits, and then continuously shifting the unsent data to the upper eight bits, but this method cannot meet the timing requirements of 125Mhz, so it was changed to the current method. Another example is calculating the header checksum. The calculation process is divided into several steps to calculate, which also effectively reduces the total number of timing violations.
But even so, there are still some signals that do not meet the timing requirements, and the timing report will produce a timing path of about negative 1ns.
To be continued, waiting to fill in the holes. . .
Pit-filling articles (Exploring the Gigabit Network) 1. Understand the entire structure of the Ethernet frame (Exploring the Gigabit Network) 2. Efforts to ensure the timing margin of digital circuits
