arm1

Instructions

You can watch the simulator at http://arm1.s3f.ru, as well as locally (to do this, clone the repository and use any local web server in the root directory of the repository).

To scroll use WASD, to zoom use the wheel or Z/X. Unfortunately, drag and drop is not available at this time.

Building and running the code

Code examples are at https://github.com/qanper/arm1_playground.

The collected examples with teletype output and demo are in this repository.

For assembly you will need the arm-none-eabi toolchain.

• In the p_c branch there is an example of assembling C code and a demonstration of teletype output. (The assembly is also available at the link http://arm1.s3f.ru/tty_example.bin). Use make to build, then select the build/test.bin file from the simulator page. Reboot the processor using the up arrow button and press the play button. I recommend pressing the fast button for faster rendering (in this case, the simulation runs without a timeout).

• The p_arch branch contains examples of assembly code demonstrating the operation of the main processor nodes. Uncomment the call to the label of interest and build using build.sh , then upload the bin file on the simulator page.

• In the master branch there is a demo example with visualization (open the Display tab to view). The assembly is also available http://arm1.s3f.ru/demo_example.bin

Presentation

Available in the repository and at http://arm1.s3f.ru/presentation.pdf

List of sources

Basic article on architecture on Wikichip: https://en.wikichip.org/wiki/acorn/microarchitectures/arm1

Instructions for the processor: http://www.bitsavers.org/pdf/acorn/ARM_Evaluation_Sys_Aug86.pdf

A bunch of articles from Ken Shirriff http://www.righto.com/search/label/arm?max-results=80

• About the encoder (http://www.righto.com/2016/01/more-arm1-processor-reverse-engineering.html) and counter (http://www.righto.com/2016/01/counting-bits- in-hardware-reverse.html) for ldm/stm operations;
• About the conditional execution control logic (which takes flags and takes a piece of instruction and gives permission to execute): http://www.righto.com/2016/01/conditional-instructions-in-arm1.html, and here about the formation of flags ( also about operating modes): http://www.righto.com/2016/02/the-arm1-processors-flags-reverse.html
• Instruction sequencer/decoder: http://www.righto.com/2016/02/reverse-engineering-arm1-instruction.html
• Microcode http://www.righto.com/2016/02/reverse-engineering-arm1-processors.html

Lots of articles from Dave's Hacks http://daveshacks.blogspot.com/search/label/arm?max-results=20

• ALU http://daveshacks.blogspot.com/2015/12/inside-alu-of-armv1-first-arm.html
• About the design of registers, register management and short circuits in inverters http://daveshacks.blogspot.com/2015/12/inside-armv1-register-bank.html http://daveshacks.blogspot.com/2015/12/inside-armv1 -register-bank-register.html
• Data bus layout http://daveshacks.blogspot.com/2015/12/inside-armv1-read-bus.html http://daveshacks.blogspot.com/2016/01/inside-armv1-read-bus-b- alu-output-bus.html
• Shift control diagram and about commands http://daveshacks.blogspot.com/2016/01/inside-armv1-decoding-barrel-shifter.html
• ALU control circuit http://daveshacks.blogspot.com/2016/01/inside-arm1v-alu-control-logic.html
• More about microcode: http://daveshacks.blogspot.com/2016/01/inside-armv1-instruction-decoding-and.html

Gratitude

This is my fork of http://www.visual6502.org/sim/varm/armgl.html simulator. I express my great appreciation to the Visual 6502 team for their development.

If you are also impressed by the processor simulation, you can donate to these guys on the page http://visual6502.org/donate_cash.html.