inna1.0 is an FPGA-based CNN adaptive mapping technology.
A deep learning accelerator is designed and optimized based on the FPGA board. It is expected to reach the industry-leading level in terms of overall performance and power consumption. The mapping technology uses the Look-Aside Acceleration framework of macro instructions to achieve one-click rapid deployment, software and hardware collaborative optimization, Supports a variety of convolutions, and the execution process does not require host intervention.
This project is the software side of mapping technology. It plans to implement a CNN mapping compiler and a CNN quantizer. First, the model file generated by TensorFlow is parsed to generate a CNN calculation graph model. The CNN mapping compiler will use the parsed calculation graph and the existing CNN Acceleration library unit, select the corresponding CNN library unit, generate the corresponding hardware structure and the corresponding scheduler configuration parameters to achieve a balance between calculation, on-chip storage, on-chip bandwidth and off-chip bandwidth, thereby achieving optimal computing performance; CNN The quantizer can perform 8-bit fixed-point quantization on each layer of data based on the weight file of the model to facilitate FPGA DSP calculations, thereby reducing storage overhead, increasing processing speed, and reducing power consumption while ensuring accuracy.